Lab will be performed in three sessions for 3 groups. Each student must attend to his/her own group which is assigned.

Session 1: 11:00-13:00 for group 1

Session 2: 14:00-16:00 for group 2

Session 3: 16:00-18:00 for group 3

Course covers following logic circuit topics:

Realizing Boolean functions with logic Gates,

Design and implementation of combinational logic circuits,

Sequential circuit design and test

Synchronous and asynchronous Counters

Registers

At least 80% attendance is expected from each and every student. Students who do not fulfill minimum attendance requirement will automatically receive IA grade and will not be able to take the final exam.

Students are expected to behave appropriate and respectful during the lab sessions,ones who behave otherwise will be asked to leave the session and receive zero(0) forthe experiment of that week.

Each student should bring leaflets with them while coming to the lab session and fill every requested answer with a readable and understandable handwriting.  Students will be asked to start and complete experiments along with a post-lab report in remaining 2 hours. Any Turkish explanation will not bemarked. To receive a grading from experiments, each and every student mustcomplete all three steps including pre-lab experiments, laboratory performances, and post-lab reports.

Students cannot assign partners and/or experiment stations for themselves. Prior toexperiments, lab assistant will divide the students into pairs and assign their stations.